code coverage , C, Shell, Perl, Verilog, Debugging, Python, System Verilog, Tcl, UVM methodology, Metric Driven Verification, formal verification methodologies, assertions, functional coverage, constrained random methodologies

Ovm, Verilog, Python, formal verification, Functional Verification, Asic verification, Pre-Silicon Verification, systemverilog, Uvm, Simulation

Verilog, System Verilog, Python, Machine Learning, Pre-Silicon Verification, LLMs, Uvm, formal verification, EDA Tools

Unix, Shell, C, Linux, Perl, Verilog, Python, Uvm, systemverilog

Data Manipulation, Python, Systems Administration, FPGA Prototyping, Rudimentary Firmware Skills, Emulation Platforms, Hardware Firmware Intersection, System-Level Debugging

Pcie, Ethernet, Advanced verification methodologies, Mentor, Cadence, Uvm, systemverilog, Register modeling, Protocol VIP integration, PAM2, Avery, Verification of IP AMS systems, D2D, PAM4, Synopsys