Unix, Shell, C, Perl, Linux, Verilog, Python, Uvm, systemverilog

Rest Apis, Distributed Systems, FastAPI, Kubernetes, Python, Docker, Api Development, model evaluation and fine-tuning techniques, MLOps platforms, inference optimization, Ray, LLMOps, GPU orchestration, event-driven systems, monitoring and observability tools, microservices architecture, LLM architectures

C, Shell, Verilog, Python, Test Planning, Tcl, Systemc, Transaction-level modeling using SystemVerilog, systemverilog, Assertions, Power-aware verification using UPF, Constrained-random verification, UVM-based testbench development, formal verification, NoC bus and interconnect verification

Arm, C, Python, Perl, Uvm, vManager, RISC-V Assembly, Cadence SKILL, systemverilog, Mixed Signal chips

Verilog, Unix, Python, Perl, Shell, Linux, systemverilog, Uvm

Perl, Verilog, Python, System Verilog, Tcl, Dft, DV, Uvm

automation, Python, Tcl, PDV, Physical Design tasks, advanced technology nodes, Timing Analysis, Cadence Innovus, place-and-route tools, sign-off