About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world's data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep systemlevel knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for multiple market segments

What You Can Expect

Key Responsibilities

Design Automation & Tool Development

Develop and maintain leading-edge design automation flows addressing synthesis, place-and-route, static timing analysis (STA), physical verification (PV), and power integrity
Create robust automation scripts and frameworks for regression testing, event-based job invocations, and workflow orchestration
Build tooling for automating design tasks, reducing manual effort and improving design efficiency
Port legacy tools to modern technologies (Python-based frameworks) and optimize tool flows for performance
Integrate AI/ML capabilities to supplement and enhance current tool capabilities, productivity, and adoption

Infrastructure & DevOps

Design and implement CI/CD pipelines using Jenkins, GitHub Actions, and related DevOps tools
Manage version control workflows (Git) including branching/merging strategies for large-scale projects handling 100s of repositories
Define workspace models involving multiple repositories with advanced Git knowledge (worktrees, submodules, etc.)
Implement access control, LDAP groups, ACLs, and authorization frameworks
Deploy monitoring and logging solutions using Grafana and related tools
Manage task scheduling in Linux environments using Sungrid/UGE/LSF job schedulers

EDA Tool Integration & Support

Deploy and support industry-standard EDA tools including Synopsys VCS, Cadence Virtuoso, Mentor Calibre, and related toolsets
Ensure seamless integration between internal and external tools (Github, Jira, Jenkins synchronization)
Interface with EDA vendors for optimal tool usage, license management, and performance optimization
Develop and maintain tool performance monitoring, profiling, and coverage analysis frameworks

Technical Leadership & Collaboration

Provide technical guidance and mentorship to design teams on CAD flows and best practices
Define regression workflows for multi-process, multi-threaded design flows
Collaborate with foundry engineers, design teams, and cross-functional groups to resolve complex technical challenges
Support tape-out activities and SOC integration with robust automation and verification flows
Create comprehensive documentation, user guides, and training materials

Required Qualifications

What We're Looking For

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field

Experience

8-12 years of hands-on experience in semiconductor design CAD/EDA tool development, deployment, and support
Proven experience with advanced technology nodes (16nm or below, preferably 7nm/5nm)

Technical Skills

Core Competencies

Strong development experience in Linux environment
Expert-level proficiency in version control (Git) including migration strategies and large-scale repository management
Deep understanding of infrastructure aspects: storage, compute, network, access/authorizations
Hands-on experience with Sungrid/UGE/LSF job scheduling systems
Strong knowledge of LDAP groups, ACLs, and Linux access control mechanisms

Programming & Scripting

Polyglot experience with multiple languages:
Python (primary)
Perl, Shell scripting
Tcl (for EDA tool scripting)
GNU Make
C/C++ (for performance-critical tools)
SQL (for database interactions)

Automation & DevOps

Proficiency with Jenkins for CI/CD pipeline development
Experience with GitHub/GitHub Actions for workflow automation
Knowledge of access control and security best practices
Hands-on experience with Grafana for monitoring and visualization
Implementation of logging/monitoring frameworks

EDA Tools & Design Flow

Strong expertise in industry-standard EDA tools:
Synopsys: VCS, Design Compiler, ICC2, PrimeTime
Cadence: Virtuoso, Innovus, Genus
Mentor/Siemens: Calibre
Solid understanding of semiconductor design processes (RTL-to-GDSII, verification, DFM)
Experience with physical verification flows (DRC, LVS, ERC, ESD)
Knowledge of synthesis, place-and-route, STA, and power analysis flows

Advanced Capabilities

Experience integrating AI tools to enhance productivity and tool capabilities
Expertise in regression automation and test framework development
Strong understanding of multi-process, multi-threaded execution flows
Experience with profiling/coverage analysis and optimization
Knowledge of 3rd party tool license management

Preferred Qualifications

Technical Knowledge:

Understanding of Verilog/VHDL and RTL design concepts
Front-end/UI development experience for tool interfaces
Knowledge of containerization technologies (Docker, Kubernetes)
Experience with advanced Git features (worktrees, submodules, sparse checkouts)
Familiarity with cloud-based compute infrastructure (AWS, Azure, GCP)

Design Understanding

Knowledge of timing closure methodologies and debug techniques
Understanding of power integrity, signal integrity, and EM/IR analysis
Familiarity with DFT (Design for Test) concepts
Experience with multiple power domain implementations

Key Competencies

Problem-Solving: Excellent analytical and debugging skills with ability to resolve complex technical issues
Innovation: Out-of-the-box thinking to develop creative solutions for design challenges
Collaboration: Strong team player with ability to work effectively across global teams
Communication: Excellent verbal and written English communication skills
Leadership: Ability to mentor junior engineers and provide technical guidance
Adaptability: Quick learner who can adapt to new technologies and methodologies
Quality Focus: Commitment to delivering high-quality, maintainable solutions

Additional Compensation And Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Job Description for Sr. Staff Engineer- CAD/EDA Tools & Design Automation Engineer