System Architecture, Usb, Embedded C, Pci, Uefi, Spi, C, Fpga, BIOS, Sata, Pcie, DDR, emulation verification, validation strategy, MIPI, Post Silicon Validation, high speed IO peripherals, Axi, Memory subsystem, Security Protocols, SoC Verification, technical debug, emulation platforms, SoC IP level Power Management, Validation, low power design, NPU, power management

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, BIOS, Uefi, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO peripherals, Axi, MIPI, SoC Verification