Tensorflow, Machine Learning, Pytorch, Linux, Python, Pytest, Deep Learning, Transformers

static timing analysis, Perl, Python, LINT, EDA tools for synthesis, cdc, digital design principles, verification methodologies, RTL design using Verilog, clocking resets, Simulation, Timing Analysis, RTL quality tools such as Spyglass, RDC, VHDL, low-power design techniques

OASIS, Python, Shell, Perl, Tcl, PERC, LVS, CDL, Dfm, SVRF-based automation, Verilog netlists, XOR methodologies, layout connectivity, antenna density, ASIC physical verification, Spice, Cadence Pegasus, DEF, LEF, Siemens Calibre nmDRC, metal-fill, ERC, DRC, Synopsys ICV, GDSII

Perl, Python, Tcl, FineSim, Hspice, CTS, POCV concepts, primetime, Monte Carlo analysis, STA tools, cross-talk, STA fundamentals, ICC2, Tempus, Spice simulations, Signal Integrity, Innovus, Timing Constraints, Parasitic Extraction, noise, ASIC back-end flows, AOCV

Java, Kafka, Python, API design, Incident Management, Gcp, Distributed Systems, Kubernetes, Testing, Go, Alerting systems, Flink, Microservices architecture, developer tools, Streaming Data, SDKs, Monitoring

L2, L3, Data structures, ACL, Routing algorithms, Embedded Software Development, Qos, Vxlan, Go, Microservices architecture, Linux operating systems, Debugging memory leaks, Control plane networking concepts, Performance bottlenecks, MCT

PERL, Python, Tcl, Synthesis, Formal Equivalence, DRC, Ir, LVS, EM Signoff

Golang, Apis, Sql, Docker, Python, Kubernetes, modern backend frameworks, Microservices architecture, GitHub Actions, Relational Databases, Git version control, automated testing frameworks, GitLab Pipelines