Search Jobs
Search by job, company or skills
Search by job, company or skills
Showing 2 jobs
Skills:
System Verilog, Post-silicon validation, Logic Equivalency checking, JTAG protocols, ATPG, Scan and BIST architectures
Skills:
boundary scan , Vcs, Tcl, System Verilog, Python, Perl, Tessent tool sets, TestMax, Logic Equivalency checking, EDA Tools, ATPG, Scan and BIST architectures, primetime, Gate level simulation debugging, Jtag protocols, memory BIST, TetraMax
