Test Planning, C, Systemc, Shell, Verilog, Tcl, Python, power-aware verification using UPF, systemverilog, NoC bus and interconnect verification, assertions, transaction-level modeling, UVM-based testbench development, constrained-random verification, formal verification

Perl, Debugging, Bash, Python, Tcl, SoC Verification, verification environments, standard bus protocols, Uvm, systemverilog