IP Design Verification Engineer

Position Summary

About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

Design & maintain UVMbased verification environmentsfor highspeed serial IP blocks (e.g.,56G/112G/224G Gbps SERDES, PCIe Gen4/5, Ethernet MAC/PHY,) and security IP (AES/SHA engines, ECC, secureboot, rootoftrust).

Develop comprehensive test plans and coverage modelsthat capture protocol corner cases, timing jitter, eyediagram constraints, and security threat scenarios.

Create reusable UVM components(agents, drivers, monitors, scoreboards, and protocol checkers) that can be shared across multiple serial and security projects.

Implement constrainedrandom traffic generatorswith datapattern, errorinjection, and latencystress capabilities to validate link reliability and security robustness.

Integrate formal verification and assertionbased checking(SVA) to capture protocol violations, keyexchange errors, and timing violations early in the flow.

Run and maintain regression suiteson industrystandard simulators (VCS, Xcelium, Questa) and CI pipelines monitor functional coverage, protocol coverage, and securityfeature coverage.

Collaborate closely with design, architecture, and security teamsto refine specifications, resolve bugs, and drive design for testability (DfT) and lowpower considerations.

Mentor junior verification engineers, enforce coding standards, and contribute to the IPD verification methodology library.

Participate in design reviews, risk assessments, and compliance verification(e.g., PCISIG, IEEE Ethernet, NIST crypto standards).

Required Skills & Experience

System Verilog & UVM, Formal Verificationexpertise- 5-6 years of handson verification on complex IP, with strong understanding of classbased verification, randomization, coverage, and SVA.

Highspeed serial protocol knowledge- Practical experience verifying PCIe, Ethernet SERDES, or similar highthroughput interfaces.

Security IP verification- Familiarity with cryptographic engines, secureboot flows, authentication protocols, sidechannel analysis, and related test strategies.

Simulation & automation tools- Proficient with VCS, Xcelium, or Questa scripting in Tcl/Python for test bench generation and regression management.

Coveragedriven verification- Ability to define functional, protocol, and security coverage models and drive them to closure.

Debugging & rootcause analysis- Strong waveform analysis, assertion debugging, and use of logextraction tools to isolate failures.

Version control & CI/CD- Experience with Git and Jenkins/GitLab CI for automated regression runs.

Digital design fundamentals- Understanding of clockdomain crossing, reset strategies, and lowpower design considerations for highspeed blocks.

Education- B.E./B.Tech/M.Tech in Electrical/Computer Engineering or equivalent practical experience.

Skills and Qualifications

Experience - 5 to 6 Years of experience

Qualifications

• B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltdis dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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