Senior Emulation Engineer
Senior Emulation Engineer
leadic design pvt ltd6-8 Years
- Posted 2 hours ago
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Job Description
About the job
Senior Emulation Engineer – Palladium / ZeBu
- Location: Bengaluru, KarnatakaExperience: 6+ YearsNotice Period: 0–30 Days preferredRole OverviewWe are looking for an experienced Senior Emulation Engineer with strong hands-on experience in Cadence Palladium and/or Synopsys ZeBu platforms. The role involves pre-silicon SoC verification, hardware emulation, debug, and validation of complex designs.ResponsibilitiesDevelop and execute hardware emulation environments for complex SoC/ASIC designs.
- Work hands-on with Cadence Palladium and/or Synopsys ZeBu emulation platforms.
- Support RTL bring-up, compilation, mapping, execution, and debug on emulation platforms.
- Develop and integrate testbenches, transactors, interfaces, and emulation models.
- Debug RTL and system-level issues using emulation and simulation methodologies.
- Collaborate with RTL, Design Verification, Architecture, Firmware, and SoC teams.
- Analyze emulation failures and improve test execution and debug efficiency.
- Support pre-silicon validation and software/firmware execution on emulated designs.
- Qualifications6+ years of experience in SoC/ASIC verification, hardware emulation, or pre-silicon validation.
- Hands-on experience with at least one of the following is mandatory:
- Cadence Palladium
- Synopsys ZeBu
- Strong understanding of RTL, Verilog/SystemVerilog, and SoC verification flows.
- Experience with emulation bring-up, compilation, debugging, and test execution.
- Good understanding of UVM, simulation, and pre-silicon verification methodologies.
- Scripting/programming experience in Python, Tcl, Shell, C/C++, or similar is preferred.
- Strong debugging and problem-solving skills.
- Notice period of 0–30 days preferred.
- Candidates available to work from Bengaluru in a hybrid setup.
More Info
Key Skills
About Company
Skills:
lattice , System Verilog, Usb, Verilog, Ethernet, Ddr3, C, Pcie, ARM Cortex platforms, SystemC-DPI testing methodologies, embedded processors, processor architectures, FPGA architectures, SERDES, AHB, Xilinx, VirtuaLAB environments, Altera, APB, RTL synthesis concepts, DSP theory, Veloce platforms, UVM-acceleration, AMBA, Microsemi
Skills:
lattice , Usb, Verilog, System Verilog, Ethernet, Ddr3, C, Pcie, ARM Cortex platforms, SystemC-DPI testing methodologies, processor architectures, embedded processors, FPGA architectures, SERDES, AHB, Xilinx, Altera, VirtuaLAB environments, APB, RTL synthesis concepts, DSP theory, Veloce platforms, AMBA, UVM-acceleration, Microsemi
Skills:
Pli, C, Systemc, perl, Usb, Python, Pcie, Cadence Z3, FPGA prototyping, NVLINK, Xilinx Vivado, Synopsys ZeBu, ProtoCompiler, CHI, Emulators, SV Verilog, dpi, hardware emulation, Siemens Veloce, CPU-GPU coherency, CXL, Simulators, Synplify Premier