Senior Engineer - DFT
Senior Engineer - DFT
Quest Global3-5 Years
- Posted 2 months ago
- Be among the first 10 applicants
Job Description
Job Requirements
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
More Info
About Company
Skills:
test mode timing constraints definition, Genus Synopsys, DFT concepts, Scan Insertion, Transition delay test coverage analysis, TetraMax, equivalence check DFT DRC rules, simulating test vectors, ATPG coverage analysis, Cadence Encounter Test, DFTMax, timing fixes corrective actions for timing violations, ASIC DFT
Skills:
Jtag, MBIST, FastScan, DFT architecture, Scan Insertion, ATPG, Synopsys TetraMax, EDT, Scan Compression, Stuck-at, At-speed, TestKompress, Mentor Tessent
Skills:
Jtag, Perl, Tcl, Memory BIST, Fusion Compiler, ATPG, AI-assisted workflows, Genus, Scan insertion techniques, Primetime STA, Scan architecture
Skills:
Soc Architecture, Tcl, Python, Perl, HDLs, MBIST, ATPG flow implementation, UPF, Cadence digital implementation tools, DFT architecture definition, Tempus, CPF, Scan, Genus, tessent DFT, JTAG boundary scan
Skills:
Perl, Logic Design, Python, DFT Engineering, SV, Post Silicon Testing, Coverage metrics, Constrained random testing, Uvm, Profiling Tools, Architecture Verification