Search by job, company or skills

Senior Physical Design Engineer

Early Applicant
  • Posted 2 months ago
  • Be among the first 10 applicants

Job Description

  • 4+ years of experience in Physical Design Implementation
  • Perform block level physical implementation tasks from RTL to GDSII including synthesis, floorplanning, power planning, placement, Clock Tree Synthesis (CTS) and routing.
  • Proven track record with advanced nodes of 3nm/4nm/5nm/7nm with successful tapeouts
  • Perform sign-off analysis and closure on Static Timing Analysis (STA), formal verification (LEC), power analysis (EMIR), and physical verification (DRC/LVS/ERC) for tapeout.
  • Optimize designs for Performance, Power, and Area (PPA) by improving congestion, timing, and power consumption.
  • Experience with EDA tools in DC/Genus, ICC2/FC/Innovus, PT/Tempus, Calibre/ICV/Pegasus.
  • Proficient in scripting with Tcl and Perl/Python

About Company

Job ID: 145305817

Similar Jobs

Hyderabad, India

Skills:

Perl scriptingPrimeTime-SIprimetimeAntenna ChecksLVSSubstrate BiasIR Drop Analysislow power designPhysical VerificationPhysical DesignTiming ClosureSynopsys Physical Design toolsPower GatingFloor PlanningDRCVoltage Islands

Hyderabad, India

Skills:

static timing analysisroutingInnovusLVSParasitic ExtractionFusion CompilerDRCPlacementfloorplanningClock Tree SynthesisICC2

Hyderabad, India

Skills:

Mentor-CalibrepegasusRTL handoff to GDSIICadence InnovusLVSVoltusPhysical VerificationSignal Power IntegrityDRCEM IR drop analysisStatic Dynamic IR analysisPERC resistance checks

Hyderabad, India

Skills:

AI ML conceptsphysical design tools such as Synopsys Fusion Compilerscripting and automation using Python

Beware of Scammers

We don’t charge money for job offers