ALM, Clear Quest, JIRA, Test Architecture, Iso 14971, IEC 62304, test automation frameworks, Agile Scrum development process, verification strategies, Team Center, Test Automation with Selenium

Soc Architecture, AMBA AXI CHI protocols, HW SW co-design, Memory subsystem architecture, PCIe CXL UCIe, Silicon bring-up and debugging, RTL and microarchitecture understanding, Performance analysis and simulation

Embedded Software, Rtl Design, Technical Specifications, IP selection strategies, Verification

Python, Xcelium, SystemVerilog-RNM, Uvm, Spectre, Synopsys VCS, Cadence Virtuoso, Ansys Lumerical, Verilog-AMS, analog mixed signal verification, Synopsys OptoCompiler, Skill, FineSim, optical simulation tools

Lsf, Unix, Bitbucket, Static timing analysis, AI ML, Jenkins, Git, Linux, Splunk, Python, GenAI, VLSI CAD, CI CD process, DesignSync, make, reinforcement learning, Design revision control, Dft, Design Verification, EDA Tools, Power-aware flows, Convolutional Networks, Graph Neural Networks

Tcl, Python, Perl, routing, floorplanning, UPF, RTL-to-GDSII execution, Physical Verification, automated design methodologies, LVS closure methodologies, Ir, Placement, CTS, signoff, Sta, low-power design strategies, ECO flows, physical signoff, CPF, Synthesis, Si, EM analysis, DRC

Python, Static timing analysis, Unix, Splunk, AI ML, Linux, Lsf, Bitbucket, Jenkins, Git, make, EDA Tools, GenAI, Convolutional Networks, CI CD process, SW development and debug tools, Design Verification, reinforcement learning, Graph Neural Networks, DesignSync, Dft, Design revision control, Power-aware flows

ethernet ip , C, Fpga, Python, Rtos, Linux, ASIC, Communications Protocols, TCP-IP, Firmware Verification, Embedded Systems