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Principal Engineer, Physical Design
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About Analog Devices
Analog Devices, Inc. (NASDAQ: ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .
Key Responsibilities
Position Requirements
Communication & Stakeholder Management: Excellent communication skills with the ability to operate effectively in global, cross-functional environments.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X . Come join ADI - a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare. ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.
Job ID: 153381129
Skills:
Electromigration (EM), Perl, Automation Frameworks, Python, Tcl, Tape-out experience with TSMC N3, primetime, Fusion Compiler, IC Compiler II, Synopsys DSO.ai, CPU micro-architecture, Cerebrus, Timing Closure, Standard Cell SRAM library architectures, Synopsys Fusion Design Platform, Physical Design and Methodology, Flows-as-Code, Sub-3nm device physics, Dynamic IR drop, Crosstalk challenges
Skills:
power integrity , static timing analysis, Pvs, Python, Tcl, place-and-route, primetime, floorplanning, ICC2, Cadence Innovus, Synopsys Fusion Compiler, advanced-packaging, Physical Verification, Calibre, StarRC, Timing Closure
Skills:
Power gating and retention strategies, Signal Integrity Analysis, Power Planning, ASIC SoC physical design, Leakage optimization and dynamic power reduction, UPF CPF-based low-power implementation flows, Timing Closure, Physical Verification and Signoff, Advanced low-power architectures, Clock gating methodologies, Adaptive power management techniques, Floor planning and Partitioning, Power-aware physical design and implementation closure, Placement and Optimization, Routing and Congestion Analysis
Skills:
Java, Paas, Golang, Technical Leadership, Saas, Iaas, Gcp, Javascript, Python, AWS, data streaming platforms, large scale distributed systems, architectural oversight, event-driven architecture
Skills:
Scripting, EMIR Signoff flow, In-rush current profiles, Data Analysis, EDA Tools, Dynamic vectored and vectorless Static IR, Power Distribution Network Design, On-die power gating, Problem Solving
