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Job Description:
We are seeking skilled Design Verification (DV) Engineers with 7+ years of experience to validate complex ASIC/SoC/IP designs. The role involves developing scalable verification environments, creating test plans, and ensuring functional correctness through advanced verification methodologies such as UVM.
You will work closely with design, architecture, and physical design teams to deliver first-time-right silicon.
Job Locations: Bengaluru / Chennai / Hyderabad
Key Responsibilities
Required Skills & Qualifications
Technical Skills
Programming/Scripting
Proficiency in Python/Perl/Shell scripting for automation
Education
B.Tech / M.Tech in Electronics / Electrical / Computer Engineering or equivalent
Job ID: 149213081
Skills:
bandwidth management , Machine Learning, Artificial Intelligence, Microprocessor Cores, industry-standard simulators, Specman E, hierarchical memory subsystems, Debug, IP subsystem SoCs, regression systems, congestion control, AI ML accelerators, systemverilog, vector processing units, digital systems, revision control systems, full verification life cycle, constrained-random verification environments, packet processing, Verification
Skills:
IP SoC verification, ASIC-SoC design verification, systemverilog
Skills:
Fpga, Perl, Python, object-oriented programming, RTL, test plan development, Uvm, emulation platforms, systemverilog, automation scripts
Skills:
Perl, Verilog, System Verilog, Python, Tcl, Mentor Questa, Cadence Xcelium, CHI, Ace, Synopsys VCS, Axi, AMBA, VHDL, RISC-V instruction set architecture, APB, UVM-based testbenches
Skills:
Shell, Perl, Python, Tcl, Assertions SVA, UVM methodology, Debugging RTL verification issues, Coverage-driven verification, systemverilog, Functional Verification
We don’t charge any money for job offers
