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Job Summary:
We are looking for a highly motivated and experienced Physical Design Lead to join our dynamic team and play a vital role in the physical design and implementation of next-generation integrated circuits (ICs). This leadership role offers the opportunity to leverage your expertise in physical design methodologies and lead a team in achieving successful tapeouts.
Job Location: Bangalore, Hyderabad, Chennai
Responsibilities:
Leadership:
Physical Design Expertise:
Project Management:
Qualifications:
Benefits:
Job ID: 151807931
Skills:
power integrity , Chip-Package Co-Design, Physical Design, floorplanning, Bump Planning, Package Interface Design, Signal Integrity, EDA Tools, Package Design
Skills:
routing, congestion analysis, IR drop, primetime, floorplanning, physical ECO implementation, physical optimization, Cadence Innovus, LVS, Power Planning, Physical Verification, antenna checks, Calibre, Physical Design, StarRC, ERC, Timing Closure, DRC, Placement, sign-off, RTL-to-GDSII, Synopsys ICC2
Skills:
EM IR understanding and fixes, PV closure, Util area reduction experiments, Physical aware Synthesis using FC, ECO cycle, STA analysis, PnR-Floorplan Macro placement, Density Congestion Timing issues and fixes on lower tech nodes 5nm
Skills:
Flows, Physical Design, verbal and presentation skills, Design Methodologies, debugging skills, sign-off tools
Skills:
power integrity , Unix, Linux, Tcl, Python, routing, signoff, electromigration signoff, physical signoff flows, Placement, Extraction, floorplanning, CTS, EM IR analysis, static and dynamic IR-drop analysis, decoupling strategies, power grid architectures, Ansys RedHawk, Cadence Voltus